Overview 24 matches · 0 in Waratek scope · 0 protected · 0 exploited · 0 CISA KEV · 2 public PoC · 1 EPSS ≥ 0.5
24matches
0in Waratek scope0.0%
0protected0.0%
0exploited0.0%
0CISA KEV0.0%
2public PoC8.3%
1EPSS ≥ 0.54.2%
Protected by Waratek
0
0.0%
Rule in development
0
0.0%
Mitigation candidate
0
0.0%
No exploit published
0
0.0%
Outside Waratek scope
0
0.0%
Not applicable
24
100.0%
Withdrawn CVE
0
0.0%
blocked by ARMR today
0
0.0%
partly blocked
0
0.0%
not blocked
24
100.0%
not established
0
0.0%
unrecorded
0
0.0%
Exploited
0
0.0%
Working exploit published
0
0.0%
Proof of concept only
2
8.3%
Forecast only
0
0.0%
No public exploit
22
91.7%
split by
peak 7 / year
20173
Not applicable3
High3
not blocked3
No public exploit3
20184
Not applicable4
Medium4
not blocked4
Proof of concept only1
No public exploit3
20194
Not applicable4
High1
Medium3
not blocked4
No public exploit4
20202
Not applicable2
Medium2
not blocked2
Proof of concept only1
No public exploit1
20212
Not applicable2
Medium2
not blocked2
No public exploit2
20227
Not applicable7
High5
Medium2
not blocked7
No public exploit7
20232
Not applicable2
Medium2
not blocked2
No public exploit2
2017201820192020202120222023
| CVE | Severity | Published▾ | Status | Exploitation | Description |
|---|---|---|---|---|---|
| CVE-2022-43505 | Medium | 2023-08-11 | Not applicable | No public exploit | Insufficient control flow management in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable denial of service via local access. |
| CVE-2022-38083 | Medium | 2023-08-11 | Not applicable | No public exploit | Improper initialization in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable information disclosure via local access. |
| CVE-2022-26006 | High | 2022-11-11 | Not applicable | No public exploit | Improper input validation in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access. |
| CVE-2021-33124 | Medium | 2022-05-12 | Not applicable | No public exploit | Out-of-bounds write in the BIOS authenticated code module for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access. |
| CVE-2021-33123 | High | 2022-05-12 | Not applicable | No public exploit | Improper access control in the BIOS authenticated code module for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access. |
| CVE-2021-0190 | High | 2022-05-12 | Not applicable | No public exploit | Uncaught exception in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access. |
| CVE-2021-0155 | Medium | 2022-05-12 | Not applicable | No public exploit | Unchecked return value in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable information disclosure via local access. |
| CVE-2021-0154 | High | 2022-05-12 | Not applicable | No public exploit | Improper input validation in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access. |
| CVE-2021-0153 | High | 2022-05-12 | Not applicable | No public exploit | Out-of-bounds write in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable aescalation of privilege via local access. |
| CVE-2021-0114 | Medium | 2021-08-16 | Not applicable | No public exploit | Unchecked return value in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable an escalation of privilege via local access. |
| CVE-2021-0144 | Medium | 2021-07-14 | Not applicable | No public exploit | Insecure default variable initialization for the Intel BSSA DFT feature may allow a privileged user to potentially enable an escalation of privilege via local access. |
| CVE-2020-0551 | Medium | 2020-03-12 | Not applicable | Proof of concept only | Load value injection in some Intel(R) Processors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. The list of affected products is provided in intel-sa-00334: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00334.html |
| CVE-2020-0550 | Medium | 2020-03-12 | Not applicable | No public exploit | Improper data forwarding in some data cache for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. The list of affected products is provided in intel-sa-00330: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00330.html |
| CVE-2019-11137 | High | 2019-11-14 | Not applicable | No public exploit | Insufficient input validation in system firmware for Intel(R) Xeon(R) Scalable Processors, Intel(R) Xeon(R) Processors D Family, Intel(R) Xeon(R) Processors E5 v4 Family, Intel(R) Xeon(R) Processors E7 v4 Family and Intel(R) Atom(R) processor C Series may allow a privileged user to potentially enable escalation of privilege, denial of service and/or information disclosure via local access. |
| CVE-2019-11136 | Medium | 2019-11-14 | Not applicable | No public exploit | Insufficient access control in system firmware for Intel(R) Xeon(R) Scalable Processors, 2nd Generation Intel(R) Xeon(R) Scalable Processors and Intel(R) Xeon(R) Processors D Family may allow a privileged user to potentially enable escalation of privilege, denial of service and/or information disclosure via local access. |
| CVE-2019-0151 | Medium | 2019-11-14 | Not applicable | No public exploit | Insufficient memory protection in Intel(R) TXT for certain Intel(R) Core Processors and Intel(R) Xeon(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access. |
| CVE-2018-12207 | Medium | 2019-11-14 | Not applicable | No public exploit | Improper invalidation for page table updates by a virtual guest operating system for multiple Intel(R) Processors may allow an authenticated user to potentially enable denial of service of the host system via local access. |
| CVE-2018-3693 | Medium | 2018-07-10 | Not applicable | No public exploit | Systems with microprocessors utilizing speculative execution and branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a speculative buffer overflow and side-channel analysis. |
| CVE-2018-3640 | Medium | 2018-05-22 | Not applicable | No public exploit | Systems with microprocessors utilizing speculative execution and that perform speculative reads of system registers may allow unauthorized disclosure of system parameters to an attacker with local user access via a side-channel analysis, aka Rogue System Register Read (RSRE), Variant 3a. |
| CVE-2018-9056 | Medium | 2018-03-27 | Not applicable | No public exploit | Systems with microprocessors utilizing speculative execution may allow unauthorized disclosure of information to an attacker with local user access via a side-channel attack on the directional branch predictor, as demonstrated by a pattern history table (PHT), aka BranchScope. |
| CVE-2017-5754 | Medium | 2018-01-04 | Not applicable | Proof of concept only | Systems with microprocessors utilizing speculative execution and indirect branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis of the data cache. |
| CVE-2017-5927 | High | 2017-02-27 | Not applicable | No public exploit | Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern ARM processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR. |
| CVE-2017-5926 | High | 2017-02-27 | Not applicable | No public exploit | Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern AMD processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR. |
| CVE-2017-5925 | High | 2017-02-27 | Not applicable | No public exploit | Page table walks conducted by the MMU during virtual to physical address translation leave a trace in the last level cache of modern Intel processors. By performing a side-channel attack on the MMU operations, it is possible to leak data and code pointers from JavaScript, breaking ASLR. |