Overview 9 matches · 0 in Waratek scope · 0 protected · 2 exploited · 0 CISA KEV · 6 public PoC · 4 EPSS ≥ 0.5
9matches
0in Waratek scope0.0%
0protected0.0%
2exploited22.2%
0CISA KEV0.0%
6public PoC66.7%
4EPSS ≥ 0.544.4%
Protected by Waratek
0
0.0%
Rule in development
0
0.0%
Mitigation candidate
0
0.0%
No exploit published
0
0.0%
Outside Waratek scope
3
33.3%
Not applicable
6
66.7%
Withdrawn CVE
0
0.0%
blocked by ARMR today
0
0.0%
partly blocked
0
0.0%
not blocked
9
100.0%
not established
0
0.0%
unrecorded
0
0.0%
split by
peak 4 / quarter
Q1 184
Outside Waratek scope2
Not applicable2
Medium4
not blocked4
Exploited1
Working exploit published1
Proof of concept only1
No public exploit1
Q2 182
Outside Waratek scope1
Not applicable1
Medium2
not blocked2
Exploited1
No public exploit1
Q3 181
Not applicable1
Medium1
not blocked1
No public exploit1
Q4 180
Q1 190
Q2 190
Q3 190
Q4 190
Q1 202
Not applicable2
Medium2
not blocked2
Proof of concept only2
Q1 18Q2 18Q3 18Q4 18Q1 19Q2 19Q3 19Q4 19Q1 20
| CVE | Severity | Published▾ | Status | Exploitation | Description |
|---|---|---|---|---|---|
| CVE-2020-0551 | Medium | 2020-03-12 | Not applicable | Proof of concept only | Load value injection in some Intel(R) Processors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. The list of affected products is provided in intel-sa-00334: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00334.html |
| CVE-2019-14615 | Medium | 2020-01-17 | Not applicable | Proof of concept only | Insufficient control flow in certain data structures for some Intel(R) Processors with Intel(R) Processor Graphics may allow an unauthenticated user to potentially enable information disclosure via local access. |
| CVE-2018-3693 | Medium | 2018-07-10 | Not applicable | No public exploit | Systems with microprocessors utilizing speculative execution and branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a speculative buffer overflow and side-channel analysis. |
| CVE-2018-3640 | Medium | 2018-05-22 | Not applicable | No public exploit | Systems with microprocessors utilizing speculative execution and that perform speculative reads of system registers may allow unauthorized disclosure of system parameters to an attacker with local user access via a side-channel analysis, aka Rogue System Register Read (RSRE), Variant 3a. |
| CVE-2018-3639 | Medium | 2018-05-22 | Outside Waratek scope | Exploited | Systems with microprocessors utilizing speculative execution and speculative execution of memory reads before the addresses of all prior memory writes are known may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis, aka Speculative Store Bypass (SSB), Variant 4. |
| CVE-2018-9056 | Medium | 2018-03-27 | Not applicable | No public exploit | Systems with microprocessors utilizing speculative execution may allow unauthorized disclosure of information to an attacker with local user access via a side-channel attack on the directional branch predictor, as demonstrated by a pattern history table (PHT), aka BranchScope. |
| CVE-2017-5754 | Medium | 2018-01-04 | Not applicable | Proof of concept only | Systems with microprocessors utilizing speculative execution and indirect branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis of the data cache. |
| CVE-2017-5753 | Medium | 2018-01-04 | Outside Waratek scope | Exploited | Systems with microprocessors utilizing speculative execution and branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis. |
| CVE-2017-5715 | Medium | 2018-01-04 | Outside Waratek scope | Working exploit published | Systems with microprocessors utilizing speculative execution and indirect branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis. |